1. Field of the Invention
The present invention relates to methods and apparatus for driving an integrated-circuit (IC) output pad and more particularly to such methods and apparatus which include logic circuit controls.
2. Description of the Related Art
Integrated logic circuits such as microprocessors and memories generate output signals comprising either a high logic state, referred to as a "1," or a low logic state, referred to as a "0." Such integrated logic circuits are commonly referred to as chips. Typically FET transistors connected in series form the output stage for a selected output terminal of the chip. The juncture of the transistors is tied to the terminal, which is referred to as a pad. The logic signal generated by the integrated circuit on the chip is applied to the gates of the FETs thereby driving the output pad.
The drivers are necessary because of capacitance or current loads which appear on the pad when the chip is interconnected with other components. When there are a large number of pads on the chip, there can be a large inductance in the chip's ground line. When the signal on a number of pads switches states simultaneously, which is not unusual for a chip of the type described, a large noise spike in the ground line occurs.
The problem of noise on chip pads is recognized in U.S. Pat. No. 4,731,553 to Van Lehn et al. In Van Lehn et al., a pair of output drivers are provided, one of which drives a logic level low-to-high transition with the other driver operating in the high logic level steady-state stage. Each driver is connected to a separate power supply with the object being to isolate power supply nodes of those pad drivers which remain in a given output state from noise created by other pad drivers which are making a logic transition.
While Van Lehn et al. may achieve this end, it does so at the expense of adding a time delay circuit and a number of logic gates for each pad, as well as a separate power supply, to the chip. As noted in Van Lehn et al., as the desired speed of operation of a logic circuit increases, noise also increases. In designing logic circuits, selecting the speed of operation of the circuit is a function of the amount of noise which can be tolerated in a particular application. The faster the logic circuit output pads are driven, the more noise is generated.